The present invention relates to the fabrication of integrated circuits. More particularly, the invention provides a technique, including a method and apparatus, for preventing particle generation from interior surfaces of a chemical vapor deposition (CVD) treatment chamber. The present invention also may be applied to an apparatus for plasma-enhanced CVD (PECVD), plasma etching, physical vapor deposition (PVD), and the like.
In the manufacture of high density integrated circuits, commonly termed VLSI devices, contaminant particles are a major problem. In particular, contaminant particles attach themselves to unpassivated elements of integrated circuit devices during fabrication, where they can create short circuits or cause reliability problems. Therefore, the contaminant particles ultimately reduce the yield of good dies on a conventional semiconductor wafer. Even worse, as feature sizes decrease, the influence of contaminant particles in the fabrication of integrated circuits becomes greater.
Accordingly, semiconductor equipment vendors and users, alike, often rely upon elaborate and expensive techniques to control potential sources of contaminant particles. Such techniques include the use of ultra-clean rooms, super automated handling equipment, and sophisticated process controls during the fabrication of integrated circuits to reduce the potential sources of contaminant particles. However, such techniques can only be of limited success because substantial amounts of contaminant particles in integrated circuit fabrication are actually derived from reactant by-products created when semiconductor wafers undergo processing.
These reactant by-products often attach themselves to interior surfaces of a process chamber and form into a thick contaminant residue layer. Typically, the contaminant residue layer is derived from by-products of reactant gases and other by-products already attached to interior surfaces of the process chamber. Portions of the contaminant residue layer can flake off and deposit onto unpassivated surfaces of the integrated circuit, thereby damaging such integrated circuit by causing short circuits, broken connections, missing elements, and reliability problems.
In a conventional silicon dioxide deposition process, for example, the reactant gases used may be mixtures of organic silane or TetraEthylOrthoSilicate (TEOS) and ozone. These gases are introduced into the chamber to form a silicon dioxide layer on surfaces of a semiconductor water. As the silicon dioxide layer is formed, however, these gases also form particulate compositions. The particulate compositions form loosely attached contaminant residues on the interior surfaces of the process chamber. These interior surfaces of the chamber include a gas dispersion head, electrodes, walls, and any other exposed surfaces. The loosely attached contaminant residues often form into a thicker contaminant residue layer, which is likely to flake off and fall onto the integrated circuit.
To prevent portions of the contaminant residue layer from damaging the integrated circuit, a variety of cleaning techniques have been used. These cleaning techniques require separate process steps, which include machine shut-down and cleaning, after each deposition step. This is time consuming, expensive, and difficult to achieve. Of course, when the system is not operating, its throughput drops, rendering the manufacturing process all the more expensive.
An example of a conventional cleaning technique for a silicon dioxide deposition apparatus involves sequential steps of machine shut-down, dismantling portions of the process chamber, and hand wiping interior surfaces of the process chamber using appropriate materials, e.g. rinse water and clean wipes. The hand wiping step attempts to remove contaminant residues from the interior surfaces. Other conventional cleaning techniques sometimes used rely upon hand wiping the interior surfaces of the process chamber with a liquid chemical solution, such as a dilute hydrofluoric acid solution, or an organic solvent, in an attempt to dissolve and remove the contaminant residues. These conventional cleaning techniques also are applied to vacuum exhaust channels and pump systems because diminished vacuum or suffocation often occurs with accumulated residues or contaminant clogging. The conventional techniques are time consuming, and generally provide additional sources for even more contamination.
Plasma enhanced dry cleaning techniques have also been used to remove contaminant residues from interior surfaces of a deposition chamber. The dry cleaning techniques often take place during a separate process step, for example, by introducing cleaning gases into a process chamber, striking a plasma from the cleaning gases, and using the plasma to remove contaminant residues. Preferably, ionic species in the plasma combine with the contaminant residues to form volatile products which are removed from the process chamber. The dry cleaning techniques typically are used after every deposition run to be effective in keeping the interior surfaces of the process chamber substantially free from contaminant residues.
Another method for in-situ cleaning is set forth in U.S. Pat. No. 5,427,621, assigned to Applied Materials, Inc. That patent recognizes that a quick change in a magnetic field will generate a DC bias voltage spike to dislodge particles from the interior surfaces of a processing chamber. The magnetic field traps electrons released in a plasma cloud in the magnetic field. A sudden change in the magnetic flux density allows electrons suddenly released and their associated ions to bombard the inside surfaces of the process chamber to dislodge any film or particulate contaminants coating the chamber walls.
A method for removing particle contaminants is set forth in another application in which one co-inventor of the present application is also a co-inventor, U.S. Ser. No. 07/899,539, filed Jun. 16, 1992, abandoned, and a CIP of that application filed Nov. 29, 1993, abandoned, U.S. Ser. No. 08/158,243, with an FWC filed Nov. 20, 1995, U.S. Ser. No. 08/559,855, issued Apr. 22, 1997 as U.S. Pat. No. 5,622,595. Those two applications discuss preventing particles formed during a plasma or dislodged during a plasma from depositing on a wafer at the end of the plasma process when the plasma is turned off. This is done by a plasma purge, in which reactants are turned off while maintaining a purge gas flow at a reduced pressure, but with a plasma maintained to keep particles suspended. The gas flow is then used to purge the suspended particles from the plasma before turning off the plasma.
Another method is set forth in U.S. Pat. No. 5,456,796, issued Oct. 10, 1995, assigned to Applied Materials, Inc. One embodiment set forth in that patent provides for a gradual increase in RF power upon plasma initiation to avoid stirring up and circulating particles within the reaction chamber.